specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage conditi on (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 20112 sy 20111129-s00001 no.a2001-1/8 LV56351JA overview LV56351JA integrates 1ch dc/dc boost converter and 1ch ldo. it is suitable as the power supply for bs/cs antennas of lcd/pdp tv and bd recorders that require automatic recovery without ic destruction and malfunction when the output is short-circuited. functions dc/dc boost converter ldo ? soft-start time: 2.8ms ? ? frequency 425khz operation all ? pulse by pulse over current limiter ? ? short circuit protector (scp) ? ? specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc maximum supply voltage v cc max -0.3 to 25 v ldoin maximum input voltage v ldoin -0.3 to 30 v sw maximum voltage v sw -0.3 to 30 v allowable power dissipation pd max *1 1.1 w operating temperature topr -30 to 85 c operating junction temperature tjopr -30 to 125 c storage temperature tstg -40 to 150 c allowable pin voltage v cc , en 25 v sw, ldoin, ldoout 30 v in1, in2, fb, scp, pgood, ddctl 6v *1: when mounted on the specified printed circuit board (32mm 38mm 1.6mm), glass epoxy, double side board caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos ic 1ch dc/dc boost converter orderin g numbe r : ena2001
LV56351JA no.a2001-2/8 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc supply voltage v cc 8 to 23 v ldoin input voltage v ldoin 8 to 28 v sw voltage v sw -0.3 to 28 v en voltage v en 0 to 23 v electrical characteristics at ta = 25 c, v cc = 12v, v en =2v, ldoin=16v, ldoout=15v parameter symbol conditions ratings unit min typ max all supply current i cc switching is turned off 1.8 3.5 ma i off en=0v 10 a reference voltage vref 1.2348 1.26 1.2852 v enable voltage v en 2.0 v disable voltage v dis 0.4 v en input current i en v en =2.0v 10 a pgood threshold v pg in1 vref 85% and in2 vref 85% vref 0.85 v pgood sink current i pg v pgood =0.5v 1.0 ma pgood leak current i pglk v pgood =2v 10 a uvlo on voltage v uvlo 7.0 v thermal shutdown temperature t tsd *2 130 c tsd hysteresis t hys *2 30 c dc/dc boost converter fb output voltage ?low? fb low in1=2.0v, i fb =-20 a (sink) 0.2 v fb output voltage ?high? fb high in1=0.2v, i fb =20 a (sink) 1.8 v soft-start time t ss 2.8 ms oscillator frequency f osc 425 khz max on duty d max 78 85 92 % sw on resistance r on 0.7 sw peak current i pk 1.5 1.8 a scp source current i scp 4.8 a scp threshold v scp vref v ddctl on voltage v ddctlon dc/dc off 2.0 v ddctl off voltage v ddctloff dc/dc on 0.4 v ddctl input current i ddctl v ddctl =2v 20 a ldo maximum output current i o max 350 520 670 ma line regulation r ln 16v < ldoin < 21v 20 mv load regulation r ld 10ma < i o < 300ma 20 mv dropout voltage v drop i o =300ma 0.25 0.4 v short current i short ldoout=gnd 100 ma *2: design guarantee value.
LV56351JA no.a2001-3/8 package dimensions unit : mm (typ) 3179c specified board (32 38 1.6mm 3 , glass epoxy, double side board) scp v1 pgood ddctl en vcc gnd ldoin ldoout c1 c2 d1 c3 c5 r7 c4 r1 r3 r2 r4 c6 r5 r6 c7 l1 ? front ? ? back ? pin assignment 6.5 4.4 6.4 0.22 0.65 (0.33) 110 11 20 0.5 0.15 1.5max 0.1 (1.3) sanyo : ssop20(225mil) -30 0 30 60 90 120 0.44 0 0.5 1.0 1.5 pd max -- ta 1.1 allowable power dissipation, pd max - w ambient temperature, ta - c mounted on a specifid board : 32 38 1.6 mm 3 , glass epoxy, double side board pgnd nc pgnd nc nc ldoout ldoin in2 in1 fb sgnd pgnd nc sw nc v cc en ddctl scp pgood 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
LV56351JA no.a2001-4/8 pin function pin no. pin name function equivalent circuit 4 5 10 ldoout ldoin sgnd ldo output ldo input signal ground(*3) 5 ldoin ldoout sgnd 4 10 7 in2 ldo feedback input 7 in2 sgnd 10 8 in1 dc/dc error amplifier input 8 in1 sgnd 10 9 fb dc/dc error amplifier output 9 fb sgnd 10 11 pgood power good output pgood sgnd 10 11 12 scp dc/dc scp capacitor connect pin for timer setting scp sgnd 10 12 13 ddctl dc/dc on and off control ddctl sgnd 10 13 vreg 14 15 en v cc enable power supply en sgnd 10 14 v cc 15 continued on next page.
LV56351JA no.a2001-5/8 continued from preceding page. pin no. pin name function equivalent circuit 17 1 19 20 sw pgnd dc/dc open drain output power ground(*3) vreg 17 sw 1 19 20 pgnd *3: when you use this ic, please short-circuit all th e pins of sgnd and pgnd on the ic mounting side. function overview (1) uvlo (under voltage lockout) uvlo stops outputs of both dc/dc and ldo to prevent malfunction when v cc decreases. uvlo operates when v cc falls below the uvlo voltage. this function is a non-latch-type, and recovers these outputs automatically when v cc exceeds the uvlo voltage. (2) power good power good notifies that the output voltages of dc/dc and ldo are within the range of the setting voltage. the two output voltages are monitored through the voltage of in1 and in2. the output is judged to be ?power good? when both outputs are 85% or higher compared to the setting voltages. if either in1 or in2 voltage falls below vref 85%, pgood output becomes l h (no good). when in1 and in2 voltages become (vref 85%) + 30mv or higher, pgood output becomes h l (good). during soft start, the output is h (no good). ? power good circuit diagram ? (3) pulse-by-pulse over current protection (p by p) the p by p stops switch-on operation of a certain cycle by force when the current of power mosfet reaches the maximum output peak current. ? p by p circuit diagram ? (4) short circuit protector (scp) when output voltage of dc/dc decreases due to short-circu it; for example, scp latches off the outputs of dc/dc and ldo by timer. when output voltage of dc/dc decreases and fb turns to h, which is the error amplifier output, charge at 4.8 a constant current starts to scp capacito r for timer setting. when scp voltage exceeds the threshold voltage (=vref), latch-off occurs. if the output voltage recovers until the time the scp voltage reaches to the threshold voltage, scp capacitor is discharged and timer is reset. to restart the output after latch-off, you need to input en signal again. if you do not use the scp function, make sure to short scp and gnd. in1 in2 + + - p. good comp. power supply (6v or less) good l output no good h output 10k (example) pgood pin (hysteresis=30mv) logic error amp. pwm comp. sw_pin power p by p comp. triangular wave the current of power_tr is constantly monitored. if the peak current > 1.8a, switching_on operation during the cycle stops compulsorily
LV56351JA no.a2001-6/8 to define timer, you need to calculate a value of scp capacitor using the following formula because timer (tscp) depends on capacitance. cscp = (i scp tscp) / vref (5) dc/dc on and off control this function controls on and off of dc/dc during the operation of ic. ? turning on dc/dc ? where ddctl=low or open, dc/dc and ldo operate at the same time. ? turning off dc/dc ? where ddctl=high, dc/dc is compulsorily stopped and only ldo operates. when ddctl is switched from h to l (or open), ldo stops temporarily and dc/dc starts with soft start and th en ldo restart. if you switch ddctl during ic operation, make sure that the output waveforms of dc/dc and ldo are normal. output voltage setting output voltages are given by the following formulas. ? resistance for output setting ? dcdcout = (1+r2/r1 ) vref [v] ldoout = (1+r4/r3 ) vref [v] start and stop start: make sure to input en signal (l h) after supplying v cc =12v. stop: reverse-operation of start. ? output waveform during start and stop ? in1 in2 r1 r2 r3 r4 dc/dc out ldoout softstart 2.8ms 16v 15v 12v(=v cc ) 0v en 5ms dc/dc out ldoout delay 500 s time i scp =4.8 a logic vref tscp < scp circuit diagram > < waveform of scp_pin > scp_pin c scp for timer setting discharge tr scp comp. dc/dc output scp voltage dc/dc off( v cc ) threshhold voltage (vref) time reset latch-off
LV56351JA no.a2001-7/8 block diagram and applicati on circuit 1 (for bs antenna) condition: v cc =12v, dcdcout=16v, ldoout=15v ? note ? when ldoout is in the over current state or the short-circuit state, ic and external parts are protected by over current limiter of ldo. and when dcdcout is short-circuited, ic stops by timer latch-off type scp function. application circuit 2 (for bs/cs antenna) bs condition: v cc =12v, dcdcout=16v, ldoout=15v cs condition: v cc =12v, dcdc=off, ldoout=11v vreg vref + + - soft start osc p by p vreg + - ilimit + - pgood uvlo scp tsd dc/dc control sgnd pgnd v cc in1 fb scp pgood en ddctl sw ldoin ldoout in2 v cc =12v c1 c5 c6 r5 r1 r2 r6 c7 dc/dcout (ldoin) c4 r7 high enable l1 d1 c2 dc/dc boost converter dc/dc out=16v ldoout=15v i o =270ma ldo c3 r4 r3 vreg vref + + - soft start osc p by p vreg + - ilimit + - pgood uvlo scp tsd dc/dc control sgnd pgnd v cc in1 fb scp pgood en ddctl sw ldoin ldoout in2 v cc =12v dc/dcout (ldoin) dc/dc boost converter dc/dc out=16v/11.7v ldoout=15v/11v i o =270ma ldo 2v ddctl=l : ldoout=15v ddctl=h : ldoout=11v tr for ldo output switching
LV56351JA ps no.a2001-8/8 ? addition ? the above application circuit enables switc hing between 15v for bs and 11v for cs. where ddctl=l, dc/dc booster is turned on and set as follows: dcdcout=16v, ldoout=15v. where ddctl=h, dc/dc booster is turned off an d set as follows: dcdcout=11.7v, ldoout=11v. (because the resistance value of ou tput setting of ldo is switched) ? output waveform at switching ? ldoout=15v 11v ldoout=15v 11v this catalog provides information as of february, 2012. specifications and info rmation herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. dc/dc out ldoout 16v 15v 12v(=v cc ) 11v ddctl dc/dc out ldoout 16v 15v 12v(=v cc ) 11v ddctl time time 5ms delay+softstart 3.3ms
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